1. Field of Invention
The present invention relates to a semiconductor apparatus and a semiconductor fabrication method. More particularly, the present invention relates to a baking apparatus, a baking method and a method of reducing a gap width.
2. Description of Related Art
Due to the rapid development of integrated circuits, minimizing the device dimension and increasing the integration level have become the mainstream in semiconductor industry, and the key technology is in photolithography.
In the photolithography process, it is known that the uniformity of critical dimensions is affected by the baking temperature distribution. Usually a line width of 5 nm is changed as the temperature is shifted by each degree in Centigrade (° C.). A baking apparatus generally includes a plurality of heating units so as to control the temperature variation within +/−0.2° C. However, it is inevitable that when a substrate is heated in the baking apparatus, different sites of the substrate corresponding to the heating units are heated differently, and thus the baking temperature range is still up to 0.4° C.
As semiconductor production enters the nanometer era such as 65 nm or even less, the temperature range of 0.4° C. is high enough to cause variations in critical dimensions, and the yield and the performance of semiconductor devices are accordingly affected. Therefore, it has become an important topic about how to maintain the baking temperature to be more even so as to increase the uniformity of critical dimensions.
In addition, raising the line width resolution in the photolithographic process beyond 65 nm in the current state of technology is rather difficult, unless a light source having a shorter wavelength and a corresponding photoresist are used. However, it is very costly to replace existing machines entirely with new machines for this purpose. Therefore, another important topic about how to reduce critical dimensions controllably with existing machines has been developed.